The present invention relates to the reduction of the stress in heteroepitaxially grown GaAs on Si and more particularly to the method of mesa release and deposition (MRD) for the realization of the stress relief from the perspective of fabrication of devices. The invention further relates to gallium arsenide on silicon MESFETs manufactured by using the mesa release and deposition technique of the invention.
Heteroepitaxy of gallium arsenide on silicon (GaAs-on-Si) has received considerable attention due to the promising monolithic combination of devices in each of these materials. The presence and interaction of crystal defects and thermally induced stress have posed obstacles for reliable optoelectronic applications using GaAs-on-Si substrates.
Stress-free GaAs-on-Si seemed to be feasible only when using the so-called Epitaxial Lift-Off (ELO) method, wherein a homoepitaxially grown structure is removed from its GaAs substrate and deposited on a new host. Although the technique has great potential, the transportation to and alignment with existing circuitry on the new carrier of small geometry ELO structures is troublesome. Typically, Epitaxial Lift-Off is a process that involves attaching a released GaAs device layer, which has been homoepitaxially grown on a GaAs substrate, to a silicon carrier. The processing, i.e. forming of the electronic devices, on the GaAs device layer can be done either before or after the transplantation of the GaAs layer to a new host. The foregoing process, while providing a viable alternative, is disadvantageous in that it presents device alignment difficulties and a more complex fabrication process.
The present invention is directed to a novel mesa release and deposition technique that relieves the thermally induced stress in the heteroepitaxially grown GaAs-on-Si. The technique uses an aluminum arsenide (AlAs) layer to chemically release post-growth defined GaAs mesas from the GaAs-coated-Si substrate and thereafter to reattach the mesas in their original positions. This allows the insertion of low-stress GaAs-on-Si mesas with dimension of at least 1.times.10.sup.4 .mu.m self-aligned within Si circuits by an extremely simple process.
The present invention describes the GaAs mesas release and reattachment process and its application to i) stress relief by post-growth etching and MRD processing, ii) the feasibility of subjecting the mesa released and deposited device regions to further processing that results in MESFET fabrication and iii) the regrowth of GaAs on mesa released and deposited regions that results in as-grown stress free GaAs on Si.